Azad Naeemi - Dissemin

Papers authored by Azad Naeemi

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2013 Shaloo Rakheja, Sou-Chi Chang, Sou-Chi Chang, Azad Naeemi

Impact of Dimensional Scaling and Size Effects on Spin Transport in Copper and Aluminum Interconnects

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Shaloo Rakheja, Azad Naeemi

Roles of Doping, Temperature, and Electric Field on Spin Transport Through Semiconducting Channels in Spin Valves

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Vachan Kumar, Shaloo Rakheja, Azad Naeemi

Review of multi-layer graphene nanoribbons for on-chip interconnect applications

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Shaloo Rakheja, Vachan Kumar, Azad Naeemi

Evaluation of the Potential Performance of Graphene Nanoribbons as On-Chip Interconnects

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Shaloo Rakheja, Vachan Kumar, Azad Naeemi

Performance modeling for interconnects for conventional and emerging switches

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Vachan Kumar, Li Zheng, Muhannad Bakir, Azad Naeemi

Compact modeling and optimization of fine-pitch interconnects for silicon interposers

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Erdal Uzunlar, Rohit Sharma, Rajarshi Saha, Vachan Kumar, Rizwan Bashirullah, Azad Naeemi

, Paul A. Kohl

Design and Fabrication of Ultra Low-loss, High-performance 3D Chip-chip Air-clad Interconnect Pathway

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Peng Zheng, Sarah E. Bryan, Yinxiao Yang, Raghu Murali, Azad Naeemi

, James D. Meindl

Hydrogenation of Graphene Nanoribbon Edges: Improvement in Carrier Transport

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A. Ceyhan, A. Naeemi

Impact of conventional and emerging interconnects on the circuit performance of various post-CMOS devices

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Shaloo Rakheja, Azad Naeemi

Communicating Novel Computational State Variables: Post-CMOS Logic

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Ahmet Ceyhan, Azad Naeemi

Cu Interconnect Limitations and Opportunities for SWNT Interconnects at the End of the Roadmap

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Chenyun Pan, Azad Naeemi

System-level analysis for 3D interconnection networks

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Chenyun Pan, Chenyun Pan, A. Ceyhan, A. Naeemi

System-level optimization and benchmarking for InAs nanowire based gate-all-around tunneling FETs

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2012 Vachan Kumar, Shaloo Rakheja, Azad Naeemi

Performance and Energy-per-Bit Modeling of Multilayer Graphene Nanoribbon Conductors

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Vachan Kumar, Azad Naeemi

Analytical models for the frequency response of multi-layer graphene nanoribbon interconnects

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S. Rakheja, A. Naeemi

Compact modeling of spin-transport parameters in semiconducting channels in non-local spin-torque devices

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Vachan Kumar, Rohit Sharma, Jikai Chen, Abhimanyu Kapoor, Rizwan Bashirullah, Paul Kohl, Azad Naeemi

Compact modeling and performance optimization of 3D chip-to-chip interconnects with transmission lines, vias and discontinuities

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Nickvash Kani, Azad Naeemi

Circuit-technology co-optimization of heterogeneous hierarchical network-on-chips

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Chenyun Pan, Azad Naeemi

System-level optimization and benchmarking of graphene PN junction logic system based on empirical CPI model

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Ahmet Ceyhan, Azad Naeemi

System-level design and performance modeling for multilevel interconnect networks for carbon nanotube field-effect transistors

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Papers authored by Azad Naeemi