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SiC Trench MOSFET with Shielded Fin-Shaped Gate to Reduce Oxide Field and Switching Loss

This paper was not found in any repository; the policy of its publisher is unknown or unclear.
This paper was not found in any repository; the policy of its publisher is unknown or unclear.

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Abstract

A silicon carbide shielded fin-shaped gate metal-oxide-semiconductor field effect transistor (SF-MOS) is proposed in this letter, which utilizes a well-grounded p-region to shield the fin-shaped trench gate. Numerical simulations by Sentaurus TCAD are carried out to study the performance of SF-MOS, and comparisons with conventional trench MOSFET and the state-of-the-art double-trench MOSFET are presented. The maximum electric field in gate oxide of the SF-MOS is effectively lowered to below 3 MV/cm, which is a widely accepted criterion for long-term gate oxide reliability. Furthermore, with the shielding effects, the gate-to-drain charge of the SF-MOS is significantly reduced, leading to lower switching loss. © 2016 IEEE.