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Elsevier, Microelectronic Engineering, 7(88), p. 1342-1345

DOI: 10.1016/j.mee.2011.03.089

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Transport and interface states in high-κ LaSiOx dielectric

This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

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Abstract

The paper presents the results of capacitance–voltage, conductance-frequency and current–voltage characterization in the wide temperature range (140–300K) as well as results of low temperature (5–20K) thermally stimulated currents (TSC) measurements of metal–oxide-semiconductor (MOS) structures with a high-κ LaSiOx dielectric deposited on p- and n-type Si(100) substrate. Interface states (Dit) distribution determined by several techniques show consistent result and demonstrates the adequacy of techniques used. Typical maxima of interface states density were found as 4.6×1011eV−1cm−2 at 0.2eV and 7.9×1011eV−1cm−2 at 0.77eV from the silicon valence band. The result of admittance spectroscopy showed the presence of local states in bandgap with activation energy Ea=0.38eV from silicon conductance band, which is in accord with interface states profile acquired by conductance method. Low-temperature TSC spectra show the presence of shallow traps at the interface with activation energies ranging from 15 to 32meV. The charge carrier transport through the dielectric film was found to occur via Poole–Frenkel mechanism at forward bias.