Published in

IOP Publishing, Journal of Physics: Photonics, 2(2), p. 025003, 2020

DOI: 10.1088/2515-7647/ab7557

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Next generation low temperature polycrystalline materials for above IC electronics. High mobility n- and p-type III–V metalorganic vapour phase epitaxy thin films on amorphous substrates

This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

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Abstract

Abstract We report on the growth and electronic properties of polycrystalline III–V semiconductors, which to date have not been discussed in depth in the literature. III–V polycrystalline semiconductor thin films were grown by metalorganic vapour phase epitaxy in the temperature range 410 °C–475 °C, which is compatible for integration into the Back-End-Of-Line (BEOL) silicon based integrated circuits. The thickness of the films in this study is in the range of tens to a few hundreds of nanometers, and deposited on amorphous substrates (either smart-phone-grade glass or Si/SiO2) and, also, on oxidised GaAs epi-ready wafers. Extensive AFM, SEM and TEM analyses show interlinked-to-continuous polycrystalline III–V films based on In(Al)As or GaSb. Hall-van der Pauw measurements return results of high mobility and controllable charge density for n- and p-type field effect transistors. In the GaAs/In(Al)As system, electron density ranging from 1 × 1016 to 1 × 1019 cm−3 (n) was achieved, with room temperature mobility values in the range of 100–150 cm2 V−1 s−1 and hole mobility values in the range of 1–10 cm2 V−1 s−1 have been measured in Zn doped samples. Polycrystalline GaSb films demonstrated p-type behaviour (1 × 1017 cm−3) with remarkably high room temperature hole mobility values up to 66 cm2 V−1 s−1 for the films grown on Si/SiO2 substrate (and 300 cm2 V−1 s−1 for the GaAs substrate where an epitaxial process is actually in place). Materials could be stacked into heterostructures, providing a promising platform for complex devices enabling compatible n- and p- hetero-layers for 3D integration formed at temperatures ≤480 °C.