Yongliang Li - Dissemin

All papers authored by Yongliang Li

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2024 Shuaiyu Gong

, Meiyin Yang

, Yanru Li

, Bowen Shen

, Yongliang Li, Peiyue Yu

, Yan Cui, Jun Luo

Manipulation of Synthetic Antiferromagnetic Skyrmion by Reduced Voltage via Design of Double Interface Structure

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Yan Li

, Huaizhi Luo, Anlan Chen, Xiaotong Mao, Fei Zhao, Jun Luo, Yongliang Li

A novel approach to Si0.5Ge0.5 channel FinFET fabrication: utilizing a three-layer SiGe strain relaxation buffer and In-Situ phosphorus doping

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Shixin Li

, Yanna Luo

, Haoqing Xu

, Jiali Huo

, Zhaohai Di, Yongliang Li

, Qingzhu Zhang

, Huaxiang Yin

, Zhenhua Wu

Vertically Stacked Nanosheet Number Optimization Strategy for Complementary FET (CFET) Scaling Beyond 2 nm

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Fei Zhao

, Yan Li

, Huaizhi Luo, Xiaofeng Jia, Jiayi Zhang, Xiaotong Mao, Yongliang Li

Stacked SiGe/Si I/O FinFET device preparation in a vertically stacked gate-all-around technology

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Hao-Yan Liu, Yong-Liang Li

, Wen-Wu Wang

Narrowed Si_0.7Ge_0.3 channel FinFET with subthreshold swing of 64 mV/Dec using cyclic self-limited oxidation and removal process

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Haoqing Xu

, Jiaxin Yao

, Zhizhen Yang, Lei Cao

, Qingzhu Zhang

, Yongliang Li

, Anyan Du

, Huaxiang Yin

, Zhenhua Wu

Physical Insights of Si-Core-SiGe-Shell Gate-All-Around Nanosheet pFET for 3 nm Technology Node

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Fei Zhao, Xiaofeng Jia, Huaizhi Luo, Jiayi Zhang, XiaoTong Mao, Yan Li

, Jun Luo, Wenwu Wang, Yongliang Li

Hybrid integrated Si nanosheet GAA-FET and stacked SiGe/Si FinFET using selective channel release strategy

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This paper is made freely available by the publisher.

Anlan Chen

, Yongliang Li

, Xiaofeng Jia, Xiaohong Cheng, Wenwu Wang

Si_0.5Ge_0.5 Channel FinFET Preparation on an In Situ Doped SiGe SRB and Its Electrical Characteristics Optimization

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Chun Li, Yongliang Li

, Anlan Chen, Fei Zhao, Jun Luo, Wenwu Wang

SiGe Fin field effect transistor (FET) with STI liner skipping and channel passivation engineering

Download from link.springer.com

Fei Zhao, Yongliang Li

, JiaYi Zhang, Xiaofeng Jia, Anlan Chen, Wenwu Wang

Novel Stacked SiGe/Si FinFET Device with Subthreshold Swing of 68 mV/dec Using Optimized Thermal Budget and Channel Passivation Technology

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2022 Anlan Chen

, Chun Li, Qide Yao, Xueli Ma

, Yongliang Li

, Wenwu Wang

Optimization of SiGe interface properties with ozone oxidation and a stacked HfO₂/Al₂O₃ dielectric for a SiGe channel FinFET transistor

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Haoyan Liu, Yongliang Li

, Xiaohong Cheng, Chun Li, Jiayi Zhang, Jun Luo, Wenwu Wang, Tianchun Ye

A stacked high-Ge-concentration SiGe/Ge multilayer on a novel Ge + SiGe SRB structure for the gate-all-around MOSFETS

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Yaodong Liu

, Xianglie Sun, Jing Xu

, Jianfeng Gao, Jinbiao Liu, Xuebing Zhou, Yongliang Li

, Junfeng Li, Wenwu Wang, Tianchun Ye

, Jun Luo

Insertion of Hafnium Interlayer to Improve the Thermal Stability of Ultrathin TiSi_x in TiSi_x/n⁺-Si Ohmic Contacts

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Shujuan Mao

, Jianfeng Gao, Xiaobin He, Weibing Liu, Jinbiao Liu

, Guilei Wang

, Na Zhou, Yanna Luo, Lei Cao, Ran Zhang, Haochen Liu, Xun Li, Yongliang Li

, Zhenhua Wu

, Junfeng Li and 4 other authors

Low-Temperature (≤500 °C) Complementary Schottky Source/Drain FinFETs for 3D Sequential Integration

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Xiaohong Cheng

, Yongliang Li

, Fei Zhao

, Anlan Chen, Haoyan Liu, Chun Li, Qingzhu Zhang

, Huaxiang Yin

, Jun Luo

, Wenwu Wang

4-Levels Vertically Stacked SiGe Channel Nanowires Gate-All-Around Transistor with Novel Channel Releasing and Source and Drain Silicide Process

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Jiajia Tian

, Yujuan He, Qingzhu Zhang, Cinan Wu, Lei Cao, Jiaxin Yao, Shujuan Mao

, Yanna Luo, Zhaohao Zhang, Yongliang Li

, Gaobo Xu, Bo Li, Yanchu Han, Yang Liu, Junjie Li and 10 other authors

Improving Driving Current with High-Efficiency Landing Pads Technique for Reduced Parasitic Resistance in Gate-All-Around Si Nanosheet Devices

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Yongliang Li

, Ying Zan, Xiaohong Cheng, Fei Zhao

, Haoyan Liu, Wenwu Wang

Si0.5Ge0.5 channel introduction technique for the preparation of high mobility FinFET device

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All papers authored by Yongliang Li