Eugenio Dentoni Litta
Royal Institute of Technology
22 papers found
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Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling
UploadAtomic-layer deposited thulium oxide as a passivation layer on germanium
Download from hal.archives-ouvertes.frRecent advances in high-k dielectrics and inter layer engineering
UploadImproved low-frequency noise for 0.3nm EOT thulium silicate interfacial layer
Download from kth.diva-portal.orgInterfacial Layer Engineering Using Thulium Silicate/Germanate for High-k/Metal Gate MOSFETs
Download from iopscience.iop.org(Invited) Interface Engineering Routes for a Future CMOS Ge-Based Technology
Download from iopscience.iop.orgThulium Silicate Interfacial Layer for Scalable High-k/Metal Gate Stacks
UploadA study of low-frequency noise on high-k/metal gate stacks with in situ SiOx interfacial layer
Download from kth.diva-portal.orgMissing publications? Search for publications with a matching author name.