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2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS), 2015
DOI: 10.1109/epeps.2015.7347150
2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)
DOI: 10.1109/edaps.2016.7874429
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Performace modeling and optimization for on-chip interconnects in memory arrays
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