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2016 46th European Solid-State Device Research Conference (ESSDERC)

DOI: 10.1109/essderc.2016.7599604

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Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration

This paper was not found in any repository; the policy of its publisher is unknown or unclear.
This paper was not found in any repository; the policy of its publisher is unknown or unclear.

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