Published in
2016 IEEE Nanotechnology Materials and Devices Conference (NMDC)
DOI: 10.1109/nmdc.2016.7777117
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Performance of vertically stacked horizontal Si nanowires transistors: A 3D Monte Carlo/2D Poisson Schrodinger simulation study
Proceedings article published in 2016 by
Talib Al-Ameri,
V. P. Georgiev 
,
F. Adamu Lema,
T. Sadi,
E. Towie,
C. Riddet,
C. Alexander,
A. Asenov
,
F. Adamu Lema,
T. Sadi,
E. Towie,
C. Riddet,
C. Alexander,
A. Asenov
This paper is available in a repository.
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