Published in
2014 IEEE 18th Workshop on Signal and Power Integrity (SPI)
DOI: 10.1109/sapiw.2014.6844528
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Investigation of chip-to-chip interconnections for memory-logic communication on 3D interposer technology
Proceedings article published in 2014 by
C. Roda Neve,
J. Ryckaert,
G. Van der Plas,
M. Detalle,
E. Beyne,
N. Pantano,
M. Verhelst 
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