Interface states at the gate oxide/channel of metal oxide semiconductor (MOS) transistors generally result in detrimental effects on the device performance which need to be considered for the new generations of high-k dielectrics. In this paper, the admittance of Gadolinium silicate (GdSiO) and Lanthanum Lutetium oxide (LaLuO₃) MOS capacitors were investigated as a function of the signal frequency, temperature and gate voltage. The Arrhenius plots of the peak pulsations extracted from the conductance spectra have been discussed on the bases of simulated data taking into account a distribution of the trap energy levels and a thermally enhanced capture cross-section. The consequences of a peaked interface state distribution on the evolution of activation energies are shown to lead to Arrhenius plots following the Meyer-Neldel Rule.