The spherical subspace tracker is a low complexity adaptive algorithm that converges to the dominant (or subdominant) subspace. Spherical subspace updating is a fast way to monitor slowly time-varying subspaces, which arise in high resolution direction of arrival tracking algorithms. In real time sonar and radar array processing applications, it becomes necessary to find parallel algorithms and pipelined architectures that provide high speed solutions to these tracking problems. In this paper the spherical subspace tracker is parallelized and mapped onto systolic array architectures. The arrays are ideally suited for implementation with custom VLSI or networks of available parallel numeric processing chips such as iWarps and TMS320C40s. C-language like cell programs specify the functionality and timing of the systolic array in concrete terms.