Different etching times are used to etch silicon wafers. Effects of surface morphology on wafer minority carrier lifetime, passivation quality, and heterojunction solar cell (HJ) performance are investigated. The numbers of mountains and valleys, defined as turning points, on wafer surfaces are used to explain the minority carrier lifetime variations. For a wafer with a smaller amount of turning points, hydrogenated amorphous silicon (a-Si:H) passivation quality can be comparable to ideal iodine-ethanol solution passivation. If the wafer has a notable amount of turning points, the carrier lifetime decreases as the a-Si:H layer will not be able to be well-deposited on turning points. Furthermore, the PC1D simulation indicates that an optimal device conversion efficiency of 21.94% can be achieved at an etching time of 60 min, where a best combination of short-circuit current and open-circuit voltage is obtained.