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Institute of Electrical and Electronics Engineers, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 8(23), p. 1562-1566, 2015

DOI: 10.1109/tvlsi.2014.2341610

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A Fault-Tolerant Technique Using Quadded Logic and Quadded Transistors

Journal article published in 2015 by Jie Han, Eugene Leung, Leibo Liu, Fabrizio Lombardi
This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

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