Abstract This paper presents an analysis of the high voltage trapping processes that take place in high-electron mobility transistors based on GaN, with a metal–insulator–semiconductor (MIS) structure. The study is based on combined pulsed and transient measurements, carried out with trapping voltages in the range from 50 to 500 V. The results indicate that: (i) dynamic R _on is maximum for trapping voltages between 200 and 300 V, and decreases for higher voltage levels; (ii) R _on-transient measurements reveal the presence of a dominant trap with activation energy E _a1 = 0.93 eV and of a second trap with activation energy equal to E _a2 = 0.61 eV; (iii) the deep level transient spectroscopy (DLTS) signal associated to trap E _a1 is completely suppressed for high trapping voltages (V _DS = 500 V). The results are interpreted by considering that the trap E _a1 is located in the buffer, and originates from C_N defects. The exposure to high drain voltages may favor the depletion of such traps, due to a field-assisted de-trapping process or to the presence of vertical leakage paths.