Excessive heat and temperature gradient may introduce failures in the components, such as cracking, delamination and warpage, eventually causing device failure. While there has been significant research toward understanding the thermal performance of many different electronic packages, the majority of these studies do not take into account the combined effects of thermal and mechanical interactions. This paper evaluates the thermal performance of flip chip packages based on the couple-field elements available in a numerical code, ANSYS, to study the interactions between temperature and stresses generated during the manufacturing process, where both two dimensional (2D) plane strain and three dimensional (3D) models of the flip chip package are considered. Compared with the model assuming uniform temperature distribution over the entire package, the model with temperature gradient provided more accurate stress profiles in the solder interconnections and underfill fillet. Further finite element studies based on the 2D model are conducted to evaluate the effects of thermal conductivity and substrate board configuration on the overall temperature and stress distribution in the package.