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2008 Conference on Lasers and Electro-Optics

DOI: 10.1109/cleo.2008.4551588

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Demonstration of an Electronic Photonic Integrated Circuit in a Commercial Scaled Bulk CMOS Process

This paper is available in a repository.
This paper is available in a repository.

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Abstract

We demonstrate the first photonic chip designed in a commercial bulk CMOS process (65 nm node) using standard process layers combined with scalable post-processing, enabling dense photonic integration with high-performance microprocessor electronics.