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Institute of Electrical and Electronics Engineers, Journal of Display Technology, 3(3), p. 304-308, 2007

DOI: 10.1109/jdt.2007.900935

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Amorphous Silicon Thin-Film Transistor Backplanes Deposited at 200 $^{∘}{\hbox{C}}$ on Clear Plastic for Lamination to Electrophoretic Displays

This paper is available in a repository.
This paper is available in a repository.

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Abstract

The transition of thin-film transistor (TFT) backplanes from rigid plate glass to flexible substrates requires the development of a generic TFT backplane technology on a clear plastic substrate. To be sufficiently stable under bias stress, amorphous-silicon (a-Si:H) TFTs must be deposited at elevated temperatures, therefore the substrate must withstand high temperatures. We fabricated a-Si:H TFT backplanes on a clear plastic substrate at 200degC. The measured stability of the TFTs under gate bias stress was superior to TFTs fabricated at 150degC. The substrate was dimensionally stable within the measurement resolution of 1, allowing for well-aligned 8 times 8 and 32 times 32 arrays of pixels. The operation of the backplane is demonstrated with an electrophoretic display. This result is a step toward the drop-in replacement of glass substrates by plastic foil.