Elsevier, Microelectronic Engineering, 1-4(50), p. 87-101
DOI: 10.1016/s0167-9317(99)00269-5
Full text: Unavailable
In this paper we present an overview of the development of advanced salicide processes at Texas Instruments, addressing both Ti and Co salicides. Scaling issues, such as sheet resistance of deep sub-micron structures for Ti salicide and diode leakage on shallow junctions for Co salicide, are discussed, as well as processes developed to overcome these issues. The key material aspects controlling these variables are reviewed, such as Ti silicide phase formation and transformations and mechanisms of direct formation of C54 TiSi2, which control sheet resistance, and silicide–silicon interface characteristics for Co salicide, impacting diode leakage. Implementation and manufacturability aspects are also discussed. We present advanced Ti and Co salicide processes with manufacturing and high yield capability demonstrated for sub-0.25 μm CMOS technologies. Process modifications that extend the applicability of these salicides to 0.1 μm CMOS are also presented.