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Partitioned Cache Architecture as a Side-Channel Defence Mechanism.

Journal article published in 2005 by Dan Page
This paper was not found in any repository; the policy of its publisher is unknown or unclear.
This paper was not found in any repository; the policy of its publisher is unknown or unclear.

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Preprint: policy unknown
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Postprint: policy unknown
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Published version: policy unknown

Abstract

Recent research has produced a number of viable side-channelattack methods based on the data-dependant behaviour of microprocessorcache memory. Most proposed defence mechanisms are software basedand mainly act to increase the attackers workload rather than obviatethe attack entirely. In this paper we investigate the use of a congurablecache architecture to provide hardware assisted defence. By exposing thecache to the processor and allowing it to be dynamically congured to...