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Digital Design of a Key Synchronization System on a FPGA for a network use

This paper is available in a repository.
This paper is available in a repository.

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Abstract

This paper presents the design of a programmable digital integrated circuitry for the use on a Personal Computer (PC) communication card for the synchronization of a key generator between two different destinations. The implementation is based on Peripheral Component Interconnectional (PCI) Architecture. A Hardware PC cryptography card (which is called LAM) has been designed using a Field Programmable Gate Array (FPGA) chip in combination with the digital part (physical layer) of the PCI Bus. LAM card includes a key synchronization system. The main objective of this paper is to provide the reader with a deep insight of the theory and design of a digital cryptographic circuitry, which was designed for a FPGA chip with the use of Very (High-Speed Integrated Circuit) Hardware Description Language (VHDL) for a PCI card. A demonstration of the LAM synchronization circuitry will be presented.