Published in

2013 IEEE 63rd Electronic Components and Technology Conference

DOI: 10.1109/ectc.2013.6575760

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Design and Fabrication of Ultra Low-loss, High-performance 3D Chip-chip Air-clad Interconnect Pathway

This paper is available in a repository.
This paper is available in a repository.

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Abstract

In this study, we are pursuing an ultra low-loss interconnect pathway for 3D chip-chip connectivity, incorporating air-clad planar interconnects, air-clad TSVs, and gradual vertical-horizontal transitions. The motivation is to create an air-gap technology that offers the lowest possible effective k-value and near zero loss tangent minimizing the dielectric loss. The design and modeling of air-gap interconnection is presented. The fabrication challenges in air-clad interconnect lines are discussed. A monolithic inverted air-gap horizontal transmission line structure is proposed as a means for further decreasing the dielectric loss. Extension of air-clad TSV technology for optical transmission is briefly discussed.