Published in
International Conference on Microelectronic Test Structures, 2003.
DOI: 10.1109/icmts.2003.1197458
Institute of Electrical and Electronics Engineers, IEEE Transactions on Semiconductor Manufacturing, 2(17), p. 150-154, 2004
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Test Structure Design Considerations for RF-CV Measurements on Leaky Dielectrics
,
R. deKort,
F. N. Cubaynes,
R. J. Havens,
R. de Kort,
A. J. Scholten,
L. F. Tiemeijer
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Abstract
We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm2. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion.