This paper presents a new optimization method of ESD protection design using a mixed-mode ESD simulation with a calibrated model based on DC and TLP characteristics. As a result, the influence of power bus line resistance on ESD protection design is clarified using the calibrated model for each device used in ESD protection circuit. ESD surge flows into an internal circuit easily as the value of the power bus line resistance increases even if the ESD tolerance of a power clamp element is high enough.