Nomos Verlagsgesellschaft, Integration, 4(44), p. 280-289
DOI: 10.1016/j.vlsi.2011.04.001
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This paper describes two novel architectures for a unified multiplier and inverter (UMI) in GF(2m): the UMI merges multiplier and inverter into one unified data-path. As such, the area of the data-path is reduced. We present two options for hyperelliptic curve cryptography (HECC) using UMIs: an FPGA-based high-performance implementation (Type-I) and an ASIC-based lightweight implementation (Type-II). The use of a UMI combined with affine coordinates brings a smaller data-path, smaller memory and faster scalar multiplication.Both implementations use curves defined by h(x)=x and f(x)=x5+f3x3+x2+f0. The high throughput version uses 2316 slices and 2016 bits of block RAM on a Xilinx Virtex-II FPGA, and finishes one scalar multiplication in 311μs. The lightweight version uses only 14.5kGates, and one scalar multiplication takes 450ms.