Published in
Institute of Electrical and Electronics Engineers, IEEE Transactions on Electron Devices, 12(70), p. 6163-6168, 2023
Links
Tools
Si Interlayers Trimming Strategy in Gate-All-Around Device Architecture for Si and SiGe Dual-Channel CMOS Integration
Journal article published in 2023 by
Fei Zhao 
,
Yan Li ,
Yongliang Li,
Xiaofeng Jia,
Wenjuan Xiong,
Zhenzhen Kong,
Huaizhi Luo ,
Junjie Li,
Jiayi Zhang,
Xiaotong Mao,
Zhenhua Wu ,
Min Xu,
Jun Luo ,
Wenwu Wang
,
Yan Li ,
Yongliang Li,
Xiaofeng Jia,
Wenjuan Xiong,
Zhenzhen Kong,
Huaizhi Luo ,
Junjie Li,
Jiayi Zhang,
Xiaotong Mao,
Zhenhua Wu ,
Min Xu,
Jun Luo ,
Wenwu Wang
This paper was not found in any repository, but could be made available legally by the author.
Full text: Unavailable
Published version:
archiving forbidden
Data provided by 