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IOP Publishing, Japanese Journal of Applied Physics, 12(62), p. 121002, 2023

DOI: 10.35848/1347-4065/ad09f0

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GaAs MOSFETs with in situ Y<sub>2</sub>O<sub>3</sub> dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation

Journal article published in 2023 by J. Liu ORCID, L. B. Young ORCID, Y. H. G. Lin ORCID, H. W. Wan ORCID, Y. T. Cheng ORCID, J. Kwo ORCID, M. Hong ORCID
This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

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Abstract

Abstract Planar GaAs(100) depletion-mode (D-mode) MOSFETs as passivated with in situ deposited Al2O3/Y2O3 dielectric have shown enhancement of the drain current by 167% and 333% as the gate voltage (V g) increased from flat-band voltage (V fb), namely V g = V fb = 0.5 V to V g = 2 V and V g = 4 V, respectively, much higher than those in the previously published GaAs-based D-mode MOSFETs. In addition, we have achieved a high I on/I off of 107 and a subthreshold slope (SS) of 63 mV dec−1, which approaches the thermal limit of 60 mV dec−1 at 300 K and is the record-low value among planar (In)GaAs MOSFETs. Moreover, using the measured SS data, we have deduced an interfacial trap density (D it) of 4.1 × 1011 eV−1 cm−2 from our Al2O3/Y2O3/GaAs MOSFET, the lowest value among the planar (In)GaAs MOSFETs.