With the popularization of electronic devices and the demand for portability, low-power consumption has become crucial for integrated circuit chips. Two-dimensional (2D) semiconductors offer significant potential in constructing low-power devices due to their ultrathin thickness, enabling fully depletion operation. However, fabricating these 2D low-power devices, such as negative-capacitance transistors or tunneling transistors, often requires multiple layers of gate dielectrics or channel band engineering, adding complexity to the manufacturing process and posing challenges for their integration with silicon technology. In this work, we have developed low-power MoS2 metal–semiconductor field effect transistors utilizing a standard metal–semiconductor contact, which eliminates the need for gate dielectrics and semiconductor heterojunctions. It demonstrates a sharp subthreshold slope (SS ∼ 64 mV/dec), a minimum operating gate voltage range (−0.5 ∼ 1 V), a minimum current hysteresis (3.69 mV), and a stable threshold voltage close to 0 V (Vth ∼ −0.27 V). Moreover, we implemented an inverter circuit with a high voltage gain of 47.