Abstract Hybrid Pixel Detectors (HPDs) have become popular in particle and photon detection techniques in recent years. This type of devices consists of two parts: a pixelated sensor (based on Si, Ge, GaAs, CZT, etc.), and a readout Integrated Circuit (IC), which usually contains thousands of pixels and millions of transistors. ICs suffer from the inaccuracies of manufacturing processes, therefore HPDs have to be thoroughly tested before the sensor bump-bonding process. This paper presents a highly efficient system for the automated testing of pixelated HPDs. The presented solution is based on the Intel Arria 10 GX Field Programmable Gate Array (FPGA) development kit and a Linux-powered Personal Computer (PC), connected via Peripheral Component Interconnect Express (PCIe) 8x Gen. 3 interface. The proposed system has been built of well-thought-out modules connected through the set of precisely defined interconnects. This approach enabled the development of an architecture that may be easily implemented in both PCIe-based systems and System-on-Chip devices, such as Intel Agilex SoC. The presented system has been tested with both a manufactured IC and a model implemented in the FPGA.