Dissemin is shutting down on January 1st, 2025

Published in

American Institute of Physics, Applied Physics Letters, 1(124), 2024

DOI: 10.1063/5.0179809

Links

Tools

Export citation

Search in Google Scholar

Low temperature recovery of OFF-state stress induced degradation of AlGaN/GaN high electron mobility transistors

This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

Full text: Unavailable

Green circle
Preprint: archiving allowed
Green circle
Postprint: archiving allowed
Orange circle
Published version: archiving restricted
Data provided by SHERPA/RoMEO

Abstract

Thermal annealing is a widely used strategy to enhance semiconductor device performance. However, the process is complex for multi-material multi-layered semiconductor devices, where thermoelastic stresses from lattice constant and thermal expansion coefficient mismatch may create more defects than those annealed. We propose an alternate low temperature annealing technique, which utilizes the electron wind force (EWF) induced by small duty cycle high density pulsed current. To demonstrate its effectiveness, we intentionally degrade AlGaN/GaN high electron mobility transistors (HEMTs) with accelerated OFF-state stressing to increase ON-resistance ∼182.08% and reduce drain saturation current ∼85.82% of pristine condition at a gate voltage of 0 V. We then performed the EWF annealing to recover the corresponding values back to ∼122.21% and ∼93.10%, respectively. The peak transconductance, degraded to ∼76.58% of pristine at the drain voltage of 3 V, was also recovered back to ∼92.38%. This recovery of previously degraded transport properties is attributed to approximately 80% recovery of carrier mobility, which occurs during EWF annealing. We performed synchrotron differential aperture x-ray microscopy measurements to correlate these annealing effects with the lattice structural changes. We found a reduction of lattice plane spacing of (001) planes and stress within the GaN layer under the gate region after EWF annealing, suggesting a corresponding decrease in defect density. Application of this low-temperature annealing technique for in-operando recovery of degraded electronic devices is discussed.