Published in
Institute of Electrical and Electronics Engineers, IEEE Transactions on Circuits and Systems II: Express Briefs, 4(70), p. 1366-1370, 2023
DOI: 10.1109/tcsii.2022.3224470
Links
Tools
A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator
Journal article published in 2023 by
Yudeng Lin 
,
Jianshi Tang ,
Bin Gao ,
Qi Qin ,
Qingtian Zhang ,
He Qian,
Huaqiang Wu
,
Jianshi Tang ,
Bin Gao ,
Qi Qin ,
Qingtian Zhang ,
He Qian,
Huaqiang Wu
This paper was not found in any repository, but could be made available legally by the author.
Full text: Unavailable
Published version:
archiving forbidden
Data provided by 