As the available wide bandgap semiconductors continuingly increase their operating voltages, the electrical insulation used in their packaging is increasingly constrained. More precisely the ceramic substrate, used in demanding applications, represents a key multi-functional element is being in charge of the mechanical support of the metallic track that interconnects the semiconductor chips with the rest of the power system, as well as of electrical insulation and of thermal conduction. In this complex assembly, the electric field enhancement at the triple junction between the ceramic, the metallic track borders and the insulating environment is usually a critical point. When the electrical field at the triple point exceeds the critical value allowed by the insulation system, this hampers the device performance and limits the voltage rating for future systems. The solution proposed here is based on the shape modification of the ceramic substrate by creating a mesa structure (plateau) that holds the metallic tracks in the assembly. A numerical simulation approach is used to optimize the structure. After the elaboration of the structures by ultrasonic machining we observed a significant increase (30%) in the partial discharge detection voltages, at 10 pC sensitivity, in a substrate with a mesa structure when comparing to a conventional metallized ceramic substrate.