Institute of Electrical and Electronics Engineers, IEEE Transactions on Industrial Electronics, 9(61), p. 4824-4828, 2014
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The phase-locked loops (PLLs) are widely used in different areas of applications particularly for synchronization and control purposes in grid connected applications. A major challenge associated with the PLLs is how to improve their dynamic performance without jeopardizing their stability and filtering capability. Recently, some approaches based on adding a secondary control path (SCP) to the PLL structure have been proposed to deal with this challenge. The objective of this paper is to briefly analyze these approaches. The study starts with an overview of the PLLs with SCP. The paper proceeds with the small-signal modeling of some of these PLLs, which significantly simplifies the analysis. Using these models, the effects of adding the SCP on the PLL structure are studied. The obtained results show that the SCP may not be a practical approach to improve the PLL dynamic performance mainly because it aggravates the stability problem.