AbstractThe effective utilization of vertical organic transistors in high current density applications demands further reduction of channel length (given by the thickness of the organic semiconducting layer and typically reported in the 100 nm range) along with the optimization of the source electrode structure. Here we present a viable solution by applying rolled-up metallic nanomembranes as the drain-electrode (which enables the incorporation of few nanometer-thick semiconductor layers) and by lithographically patterning the source-electrode. Our vertical organic transistors operate at ultra-low voltages and demonstrate high current densities (~0.5 A cm⁻²) that are found to depend directly on the number of source edges, provided the source perforation gap is wider than 250 nm. We anticipate that further optimization of device structure can yield higher current densities (~10 A cm⁻²). The use of rolled-up drain-electrode also enables sensing of humidity and light which highlights the potential of these devices to advance next-generation sensing technologies.