Electrostatic properties at the nanoscale under relevant environment is of potential use in novel electrical and optical applications that bulk materials and devices can’t provide. For instance, Nanoparticles (NPs) based structures have drawn a lot of attention for possible memory-based applications. Embedding different kind of NPs in thin dielectric oxides has shown to play a key role in memory devices like memristors. NPs based non-volatile memory devices can be a suitable candidate for the next generation memory technology, especially with the industry aggressive scaling requirements. With the aid of these NPs, one can improve the efficiency, switching time and device sizes of heterojunction-based devices. Towards this purpose, the effect of silver nanoparticles (40nm) on the electrical characteristics of oxide/semiconductor heterojunctions are investigated by using the conductive atomic force microscopy (CAFM).The CAFM allows us to bias an individual NP to investigate their electrical characteristics. For this purpose, the uniform and individual dispersion of these nanoparticles is optimized by employing the appropriate sonication, dispersion methods (spin coating and drop casting) and thermal treatment on n-type Si substrate (5 ohm-cm) as well as on alumina coated Si substrate. The size and dispersion of these nanoparticles on both substrates is confirmed by means of AFM topography and SEM micrographs. Under these optimized dispersion parameters, we prepared two sets of structures with stacking [Ag-NPs/Si] and [Al₂O₃(3nm)/Ag-NPs/Al₂O₃(1nm)/Si]. For comparison of electrical characteristics, another two sets of control structures were prepared including HF-clean bare Si and [Al₂O₃/Si] stack. The effect of these individual NPs on the electrical characteristics was confirmed against the control structures. For this purpose, we initially carried out the topography of above mentioned structures in tapping mode of AFM then executed the electrical characteristic (I-V) by soft engaging an individual NP using the CAFM Au coated cantilever tip. The electrical response for both control structures during the application of sweep voltage of +3V ~0 ~ -3V, showed the rectifying behavior for the positive bias. Interestingly, electrical characteristics of stacked samples with NPs appeared to have enhanced current (reversed rectification) for negative bias during the application of same voltage sweep as shown in the attached figure (Inset show AFM image of the NPs embedded between two layer of oxide).This indicates that the NPs play a key role in the current transport. The NPs can form tunneling paths connecting the Si substrate to the AFM tip, and thus a large current can be expected due to the local field enhancement between the NP and the substrate interface. The current observed with the stacking of [Al₂O₃/Ag-NPs/Al₂O₃/Si] was more significant as compare to others and can be best candidate of the memory technology. The results are rationalized by a model that include a physics based simulation which is proposed for AFM cantilever tip and nanoparticle geometries to validate the I-V characteristics.This research will contribute to miniaturization of the memory application in NPs based data storage devices. Figure 1