Published in
Institute of Electrical and Electronics Engineers, IEEE Solid-State Circuits Magazine, 4(8), p. 57-63, 2016
DOI: 10.1109/mssc.2016.2573938
Links
Tools
Algorithms and VLSI Architectures for Low-Density Parity-Check Codes: Part 1-Low-Complexity Iterative Decoding
This paper was not found in any repository, but could be made available legally by the author.
Full text: Unavailable
Published version:
archiving forbidden
Data provided by 