Design / technology co-optimization of strain-induced layout effects in 14nm UTBB-FDSOI CMOS: Enablement and assessment of continuous-RX designs

Berthelon, R.; Andrieu, F.; Josse, E.; Bingert, R.; Weber, O.; Serret, E.; Aurand, A.; Delmedico, S.; Farys, V.; Bernicot, C.; Bechet, E.; Bernard, E.; Poiroux, T.; Rideau, D.; Scheer, P.; Baylac, E.; Perreau, P.; Jaud, M. A.; Lacord, J.; Petitprez, E.; Pofelski, A.; Ortolland, S.; Sardin, P.; Dutartre, D.; Claverie, A.; Vinet, M.; Marin, J. C.; Haond, M.

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2016 IEEE Symposium on VLSI Technology

DOI: 10.1109/vlsit.2016.7573425

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Design / technology co-optimization of strain-induced layout effects in 14nm UTBB-FDSOI CMOS: Enablement and assessment of continuous-RX designs

Proceedings article published in 2016 by R. Berthelon, F. Andrieu, E. Josse, R. Bingert, O. Weber, E. Serret, A. Aurand, S. Delmedico, V. Farys, C. Bernicot, E. Bechet, E. Bernard, T. Poiroux, D. Rideau, P. Scheer and other authors.

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Design / technology co-optimization of strain-induced layout effects in 14nm UTBB-FDSOI CMOS: Enablement and assessment of continuous-RX designs