Published in
Institute of Electrical and Electronics Engineers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 6(36), p. 1030-1042, 2017
DOI: 10.1109/tcad.2016.2611515
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ExTest Scheduling and Optimization for 2.5-D SoCs With Wrapped Tiles
Journal article published in 2017 by
Ran Wang 
,
Guoliang Li,
Rui Li,
Jun Qian,
Krishnendu Chakrabarty
,
Guoliang Li,
Rui Li,
Jun Qian,
Krishnendu Chakrabarty
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