Published in

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH)

DOI: 10.1109/arith.2016.8

Links

Tools

Export citation

Search in Google Scholar

A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes

Proceedings article published in 2016 by Xiaoping Cui, Weiqiang Liu, Dong Wenwen, Fabrizio Lombardi
This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

Full text: Unavailable

Green circle
Preprint: archiving allowed
Green circle
Postprint: archiving allowed
Red circle
Published version: archiving forbidden
Data provided by SHERPA/RoMEO