Published in
Institute of Electrical and Electronics Engineers, IEEE Transactions on Nanotechnology, 1(17), p. 100-107, 2018
DOI: 10.1109/tnano.2017.2774605
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Feasible Device Architectures for Ultrascaled CNTFETs
Journal article published in 2018 by
Anibal Pacheco-Sanchez 
,
Florian Fuchs ,
Sven Mothes ,
Andreas Zienert,
Jorg Schuster ,
Sibylle Gemming,
Martin Claus
,
Florian Fuchs ,
Sven Mothes ,
Andreas Zienert,
Jorg Schuster ,
Sibylle Gemming,
Martin Claus
This paper was not found in any repository, but could be made available legally by the author.
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