457 papers found
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Hybrid designs for non-volatile embedded memory cells
Matrix multiplication by an inexact systolic array
Editorial Message from the Editor-In-Chief
Circuits for a Perpendicular Magnetic Anisotropic (PMA) Racetrack Memory
CMOS circuits for cell-level design of a racetrack memory
On the Nonvolatile Performance of Flip-Flop/SRAM Cells With a Single MTJ
Session details: CAD and Circuits I
An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders
Design and Analysis of Approximate Compressors for Multiplication
A Single and Adjacent Symbol Error-Correcting Parallel Decoder for Reed–Solomon Codes
Message From the Editor-In-Chief
A Novel Scheme for Tolerating Single Event/Multiple Bit Upsets (SEU/MBU) in Non-Volatile Memories
A Comparative Review and Evaluation of Approximate Adders
A Design Approach for Compressor Based Approximate Multipliers
Design of Approximate Unsigned Integer Non-restoring Divider for Inexact Computing
Approximate Radix-8 Booth Multipliers for Low-Power and High-performance Operation
A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM)
Operational Fault Detection and Monitoring of a Memristor-Based LUT
A Modified Partial Product Generator for Redundant Binary Multipliers
On the Design of Approximate Restoring Dividers for Error-Tolerant Applications
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