457 papers found
Refreshing results…
Approximate computing using frequency upscaling
Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells
Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication
An Energy-Efficient and Noise-Tolerant Recurrent Neural Network Using Stochastic Computing
A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation
Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders
Design and Analysis of Approximate Redundant Binary Multipliers
Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints
Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC)
XOR-Based Low-Cost Reconfigurable PUFs for IoT Security
Detection of Limited Magnitude Errors in Emerging Multilevel Cell Memories by One-Bit Parity (OBP) or Two-Bit Parity (TBP)
A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation
Magnetic Field Sensors Based on the Direct Magneto-Electric Effect in Hexaferrite Thin Films and the Equivalent Circuit Model
Design and Analysis of Majority Logic Based Approximate Adders and Multipliers
Reduced Precision Redundancy for Reliable Processing of Data
Avalanche Dynamics and Correlations in Neural Systems
Approximate Arithmetic Circuits: Design and Evaluation
Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool
Multiple Fault Detection in Nano Programmable Logic Arrays
Missing publications? Read more about our data sources.