Published in
2016 IEEE International Solid-State Circuits Conference (ISSCC)
DOI: 10.1109/isscc.2016.7418075
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23.1 A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b source synchronous transceiver using DVFS and rapid on/off in 65nm CMOS
Proceedings article published in 2016 by
Guanghua Shu,
Woo-Seok Choi,
Saurabh Saxena,
Seong-Joong Kim,
Mrunmay Talegaonkar,
Romesh Nandwana,
Ahmed Elkholy,
Pavan Kumar Hanumolu,
Da Wei,
Timir Nandi
This paper was not found in any repository, but could be made available legally by the author.
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