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Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures - NANOARCH '12

DOI: 10.1145/2765491.2765515

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Design and reliability analysis of multiple valued logic gates using carbon nanotube FETs

Proceedings article published in 2012 by Jinghang Liang, Jie Han, Linbin Chen, Fabrizio Lombardi
This paper was not found in any repository, but could be made available legally by the author.
This paper was not found in any repository, but could be made available legally by the author.

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