Front end of line (FEOL) defect detection of ultra thin, < 0.02 mum diameter, surface Co_xSi_y fiber killer defects bridging multiple CoSi₂ gate features have typically been found to have capture rates of less than 1% for dark field and bright field defect detection tools. The edge die features of flash memory devices were found to be generating ultra thin Si Fiber/Stringer Killer defects that were undercut during a FEOL pre-clean operation, were converted to CoxSiy in the CoSi₂ process operations, and subsequently caused electrical shorts to adjacent CoSi₂ word lines thus inducing failures at sort yield testing. Using the KLA-Tencortrade voltage contrast detection tool, the eS31trade, and coupled with the uLooptrade methodology, we have demonstrated significantly higher capture rates inline and these improvements of inline detection ability allowed us to find the root cause of these Fiber/Stringer defects and implement permanent fixes for these Killer defects. Three FEOL processes were found to be interacting causing these Fiber/Stringer marginalities: STI CMP edge uniformity, gate photo patterning overlay (OL), and gate plasma etch. To permanently correct the issue, we utilized a silicon nitride film and we eliminated the CoxSFiber/Stringer defects. This paper discusses the inline detection improvements, characterization of FEOL processes contributing to the marginalities, and the process fixes for elimination of the defects that led towards improvement of sort yields