Electronics and Telecommunications Research Institute (ETRI), ETRI Journal, 1(32), p. 166-168, 2010
DOI: 10.4218/etrij.10.0209.0247
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We investigate the possibility of using adiabatic logic as a countermeasure against differential power analysis (DPA) style attacks to make use of its energy efficiency. Like other dual-rail logics, adiabatic logic exhibits a current dependence on input data, which makes the system vulnerable to DPA. To resolve this issue, we propose a symmetric adiabatic logic in which the discharge paths are symmetric for data-independent parasitic capacitance, and the charges are shared between the output nodes and between the internal nodes, respectively, to prevent the circuit from depending on the previous input data.