This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ∼ 680 cm2/V s, on/off ratios >107, gate leakage current densities <2.8×10−7 A/cm2, and subthreshold slopes ∼ 120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.