Springer, Lecture Notes in Computer Science, p. 1-16, 2011
DOI: 10.1007/978-3-642-23951-9_1
Springer Verlag, Journal of Cryptographic Engineering, 1(2), p. 1-18
DOI: 10.1007/s13389-011-0025-8
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Instruction Set Extensions (ISEs) supplement a host processor with special-purpose, typically fixed-function hardware components and in-structions to utilize them. For cryptographic use-cases, this can be very effective due to the demand for non-standard or niche operations that are not supported by general-purpose architectures. However, one disadvan-tage of fixed-function ISEs is inflexibility, contradicting a need for "algo-rithm agility." This paper explores a new approach, namely the provision of re-configurable mechanisms to support dynamic (run-time changeable) ISEs. Our results, obtained using an FPGA-based LEON3 prototype, show that this approach provides a flexible general-purpose platform for cryptographic ISEs with all known advantages of previous work, but relies on careful analysis of the associated security issues.