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ESSCIRC 2007 - 33rd European Solid-State Circuits Conference
DOI: 10.1109/esscirc.2007.4430285
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Exploring technology related design-space limitations of high performance network processing
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Abstract
This paper summarizes numerous research activities in high-performance networks and network security processing, and explores technology related performance constraints such as critical performance limitations of circuit architectures, which are set by the semiconductor technologies.