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IOP Publishing, Nanotechnology, 16(25), p. 165201

DOI: 10.1088/0957-4484/25/16/165201

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Improved performance of graphene transistors by strain engineering

Journal article published in 2013 by Viet Hung Nguyen ORCID, V. Hung Nguyen, Huy-Viet Nguyen, Philippe Dollfus
This paper is available in a repository.
This paper is available in a repository.

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Abstract

By means of numerical simulation, we study in this work the effects of uniaxial strain on transport properties of strained graphene heterojunctions and explore the possibility to achieve good performance of graphene transistors using these hetero-channels. It is shown that a finite conduction-gap can open in the strain junctions due to the strain-induced deformation of graphene bandstructure. These hetero-channels are then demonstrated to improve significantly the operation of graphene field-effect-transistors (FETs). In particular, ON/OFF current ratio can reach a value of over 10$^5$. In graphene normal FETs, transconductance, though reduced compared to the case of unstrained devices, is still high while good saturation of current can be obtained. This results in high voltage gain and high transition frequency of a few hundreds of GHz for a gate length of 80 nm. In graphene tunneling FETs, subthreshold swing lower than 30 mV/dec, strong non-linear effects such as gate controllable negative differential conductance, and current rectification are observed. ; Comment: 7 pages, 6 figures, submitted